Storage media are an integral part of many electronic systems used today and is provided to serve a variety of purposes. The memory technology used for storage can be based on various technologies known in the art, e.g. magnetic discs, solid-state hard disks, etc.
A solid-state disk technology commonly uses flash memory devices to store data. A flash memory device is a form of EEPROM (Electrically Erasable Programmable Read-Only Memory) that allows multiple memory locations to be erased or written in one programming operation. In lay terms, it is a form of rewritable memory chip that, unlike a Random Access Memory chip, holds its content without the need of a power supply. The memory is commonly used in Memory cards, USB Flash drives, MP3 players, digital cameras and mobile phones.
Flash memory is based on the Floating-Gate transistor, which is essentially an NMOS transistor with an additional conductor suspended between the gate and source/drain terminals.
Devices based on a NAND-type flash memory have certain limitations and must be handled in a specific manner. One of these limitations is that a flash memory device may fail during a programming (write) operation. When a programming failure occurs, a recovery algorithm must be activated, or the data may be lost. This algorithm requires allocating memory resources for temporary storage. When programming a page of data in the flash memory, a copy of the written data must be kept as a backup. If the programming operation is successful, then the backed-up data are no longer required. If the programming operation fails, the backed-up data is rewritten to a different location on the flash memory.
Flash memory devices known in the art, commonly allocate memory resources used for temporary and backup storage on the flash controller component.
Some interfaces, such as SCSI (Small Computer System Interface), support a re-transmission mechanism if and when the flash memory reports a programming failure event. However, this solution is not supported by all interfaces (for example, IDE—Integrated Drive Electronics).
Prior art systems and methods utilizing the flash controller memory for temporary storage include U.S. Pat. No. 6,601,132 to Nomura et al. and U.S. Pat. No. 6,788,609 to Yamagami et al.
The Nomura patent discloses a rewritable nonvolatile memory, comprising a block usage control table indicating a usage status of each block of the nonvolatile memory. According to the Namura patent, data is transmitted by the host device and stored in a write data buffer of a RAM on a block-by-block basis. When the data is written, the block usage control table enables determining whether or not the data is correctly written. If the data is not correctly written, the block address is stored as a candidate address of a defective block and writing operation is performed for another block. However, if the data is correctly written, the block usage control table updates the usage status of this block to a used status.
The Yamagami patent discloses a semiconductor disk, wherein a flash memory into which data is rewritten in block unit is employed as a storage medium. The semiconductor disk comprises a data memory for storing file data, a substitutive memory which substitutes for blocks of errors in the data memory, an error memory buffer in which error information (write failure) of the data memory are stored, and a memory controller which reads data out of, writes data into and erases data from the data memory, the substitutive memory and the error memory. Because the write errors of the flash memory can be remedied, the service life of the semiconductor disk can be increased.
A prior art flash memory system architecture 10 is shown in FIG. 1, in relation to the basic architecture of the Nomura and the Yamagami patents. System 10 includes a flash controller 12 operative to control flash memory devices 14.
Both the flash controller 12 and flash memory device 14 allocate areas in memory for temporary storage (numerals 16 and 18 respectively). Flash controller 12 employs a memory resource (such as SRAM 16) for temporarily storing code and/or data that flash controller 12 uses when executing operations in its CPU. Each flash memory device 14 includes a page buffer 18 for storing page data prior to programming the page data content to the non-volatile section of the flash memory.
However, existing approaches, which allocate memory resources for temporary storage on the flash controller, require using the flash controller memory to back up page data until page programming is completed successfully. Since the flash controller may need a backup copy of the page data in case of a write failure, a backup copy is kept in the flash controller's SRAM buffer. Therefore, the next page data write operation from the host computer to the flash controller is delayed until it is verified that no write failure occurred. Only when page programming is completed successfully, is the backup copy kept in the flash controller overwritten with new data.
Furthermore, such approaches employ system resources that might otherwise be eliminated or used for other tasks.
Therefore, there is a strong need to provide an innovative and reliable system and method for utilizing an area of memory for temporary storage on a page buffer of the flash memory device itself, rather than on the flash controller, while overcoming the limitations caused when utilizing the flash controller memory for temporary storage.